Difference frequency interference of DC/DC converter with common input voltage

On the motherboards of notebook computers, LCD TVs, Blu-ray DVDs, and communication systems, multiple DC/DC converters are usually used to obtain different voltages to power CPU, I/O, dedicated ICs, memory and other chips. In order to improve the efficiency of the system, usually several high-current DC/DC converters are directly powered by the input DC voltage. Due to the high operating frequency of the DC/DC converter, it forms a strong source of disturbance and generates high switching noise, which will generate differential mode and common mode interference signals at the input end of the power supply. When the common-input multiple-channel DC/DC converters are relatively close in space, they are more likely to interfere with each other and generate difference frequency noise. This article will take the two-way DC/DC converter with common input as an example to analyze the causes and solutions of difference frequency noise.
1 Difference frequency and its cause
Figure 1 shows a typical LCD TV application circuit. The +12 V DC input voltage passes through two DC/DC step-down converters to output +3.3 V and +5 V DC power supplies, respectively, to the analog circuit and Digital circuit power supply[1-3].

The rated switching frequencies of +3.3 V and +5 V circuits are both about 440 kHz. When only one DC/DC converter works and the other DC/DC converter does not work, their output waveforms are normal. The switching frequency and output high-frequency ripple frequency of the +3.3 V system are both f1=444.8 kHz. The switching frequency and output high-frequency ripple frequency of the +5 V system are both f2=435.5 kHz. The deviation between the two operating frequencies and the rated operating frequency is within the allowable range of the chip’s deviation. But if the two channels work at the same time, it will produce a low-frequency ripple of +3.3 V output with a frequency of 8.3 kHz and an amplitude of about 200 mV; while the +5 V output is normal and there is no low-frequency ripple signal. As shown in Figure 2(a), the switching frequency f1 at the switching node LX of the +3.3 V circuit is 444.8 kHz. The switching frequency at the switching node LX of the +5 V circuit is f2=435.5 kHz. The low-frequency ripple frequency of the output voltage of the +3.3 V circuit is about 8.3 kHz, which is the difference between the switching frequencies of the two converters |f1-f2|. It can be seen that, assuming that the output voltage ripple of the +3.3 V circuit has a difference frequency interference signal, it can be verified through analysis that this assumption is true.

In the circuit shown in Figure 2(b), the chip U1 of the +3.3 V circuit DC/DC converter is the inductance element L2 next to the +5 V circuit. The voltage waveform of the L2 Inductor node changes rapidly at a frequency of about 440 kHz, so strong electric field radiation will be generated at the inductor node. The COMP terminal of U1 is a compensation pin, which is a high-impedance input terminal, which is extremely susceptible to external interference. If the voltage at the L2 inductance node is applied to the COMP pin of U1, the signal will be input to the chip U1 to participate in feedback control, so a difference frequency interference signal appears at the output. As for the +5 V output circuit, if the COMP terminal of U2 is far away from the inductance L1 of the +3.3 V circuit, there will be no near-field interference, so the output waveform is normal.
Modeling with the +3.3 V circuit in Figure 1, using SIMPLIS software simulation, the normal voltage waveform at the COMP terminal is shown in Figure 3(a), and the output voltage ripple is also a normal 440 kHz high-frequency signal. A pulse signal with an amplitude of 100 mV, a duty cycle (Duty) of 0.275 and a frequency of 450 kHz is superimposed on the COMP terminal. This signal is used to simulate the voltage applied to the U1 COMP pin radiated from the L2 inductor node. The simulation result is shown in Figure 3(b). The voltage waveform at COMP has changed. Due to the superimposed pulse signal, the voltage waveform has low-frequency ripple, so the output voltage also has low-frequency ripple. The output voltage waveform is similar to that in Figure 2. The output voltage waveform is very similar, and the frequency of this low-frequency ripple is exactly 10 kHz, that is, the difference frequency signal of |450 kHz-440 kHz|. This verifies the previous assumption that due to near-field interference, a beat frequency signal is generated in the output voltage of the +3.3 V circuit.

Mixing circuit, also known as mixer (MIX), is to use the nonlinear characteristics of semiconductor devices to mix two or more signals, take the difference frequency or sum frequency, to obtain the required frequency signal[4]. Therefore, the difference frequency is the frequency of the mutual interference signal formed by two similar but different signals, and its value is the difference between the frequencies of the original two signals. Since the generated beat frequency interference is a low frequency signal of 8.3 kHz, it is easy to interfere with the audio and video signals of the system, thereby affecting the audio quality and producing water ripples in the image.
2 Solution
Since the low-frequency interference signal on the +3.3 V output voltage is easy to interfere with the audio and video of the system, it will seriously affect the audio quality or produce water ripples in the image, so the low-frequency signal should be removed. There are several solutions:
(1) Change the PCB layout. Since the COMP pin of the BUCK chip of the +3.3 V circuit is too close to the inductance L2 of the +5 V circuit, causing near-field interference, the COMP pin should be kept away from the inductance during layout. Figure 4 shows the improved LAYOUT layout. U2 and L2 have swapped positions. Such a position is safe for U1. Because the COMP terminal of U1 is no longer interfered by L2, the difference frequency interference signal is completely eliminated at the +3.3 V output terminal.

(2) Use higher frequency chips. For example, a BUCK chip with a switching frequency of 600 kHz is used instead of U2, so that low-frequency ripple signals no longer appear in the +3.3 V output. Because the low frequency signal is caused by the difference frequency, that is |f1-f2|, if you increase f2 to 600 kHz, then |f1-f2| will increase, from the initial 8.3 kHz to several hundred kHz, eliminating the low frequency Ripple.
(3) Add a level of LC filter at the output of the +3.3 V circuit to become a two-level filter, which can also attenuate low-frequency ripple, as shown in Figure 5(a). You can use SIMPLIS for simulation. If you want to eliminate the low-frequency ripple of 10 kHz, use 1 kHz as the cut-off frequency.=1 kHz, select the appropriate value of L3 and C3, the simulation waveform is shown in Figure 5(b). In the figure, Va is the waveform after one-stage filtering, and Vo is the waveform after two-stage filtering. It can be seen that after two-stage LC filtering, the output 10 kHz low-frequency ripple is eliminated, and only the amplitude is 30 mV and the frequency is 1. The low frequency ripple of kHz, the ripple amplitude is very small, will not have any influence on the system, and it is acceptable.

(4) Since the LC filter has a more obvious suppression effect on the ripple, a suitable inductor and capacitor can be selected to form a filter circuit according to the ripple frequency to be removed. Generally, the ripple can be reduced well. However, in this case, the sampling point of the feedback comparison voltage needs to be considered. If the sampling point is selected before the LC filter, the output voltage will be reduced. Because any inductor has a DC resistance, when there is a current output, there will be a voltage drop across the inductor, resulting in a decrease in the output voltage of the power supply, and this voltage drop varies with the output current. Select the sampling point after the LC filter, and the output voltage is the desired voltage. However, due to the introduction of an inductor and a capacitor inside the power system, the system may be unstable.
(5) Using a phase-locked loop to synchronize multiple chips to make them work at the same frequency, which can also completely eliminate the interference of the difference frequency.
Due to the need to input two or more DC/DC converters, their spatial locations are relatively close, forming a near-field coupling, which is prone to generate difference frequency interference, thereby forming low-frequency noise. Therefore, when designing the PCB board, attention should be paid to the positional relationship between the multiple circuits and the design of the ground wire. In addition, since the compensation pin of the DC/DC chip is a high-impedance input terminal, it is susceptible to external interference and must be far away from the interference source. By using a higher frequency chip, or adding a suitable LC filter at the output, the use of phase-locked loop synchronization technology can eliminate or attenuate low-frequency interference signals.
references
[1] Liu Song. Design Skills of Step-Down DC/DC Converters for Automotive Electronic Systems[J].Electronic Design and Application, 2007(5): 111-114.
[2] Liu Song. Principle and Application of Three Working Modes of Buck Converter at Light Load[J]. Power Electronics Technology, 2007, 41(11): 75-76.
[3] Liu Song. Selection of Three Positions of Current Sampling Resistor in Buck Converter[J].Electronic Design and Application, 2008(2):111-114.
[4] Zhang Suwen, Lu Zhaoxiong. High Frequency Electronic Circuit (Third Edition)[M].Beijing: Higher Education Press, 1993.